Gemlog Controls Ltd.

Industrial Controllers

DeviceNet Based

- DacNet -

FEATURES
DeviceNet Protocol Integrated with Single Point I/O
Interoperable with other DeviceNet Devices
Each Unit Controls/Monitors up to 32 Analogue and/or Digital I/O Modules
Network up to 63 DacNet Controllers on a Single DeviceNet Network
CE Compliant (with optional enclosure) EN5OO82-2 and EN55011 Limit A
Communications Over DeviceNet at 125K, 250k, or 500K baud
DeviceNet Group 2 Only Slave
DacNet is Powered from the DeviceNet Bus
DIN Rail or Panel Mountable Metal Enclosure Optional

 

By installing a distributed control system using the DacNet controller, you eliminate the long sensor lines. The DacNet controller is designed to be placed near the actual sensors and actuators; shortening the sensor lines to minimal distances. These controllers are networked back to a DeviceNet master via a network cable. Depending on the network configuration, you may have up to 62 DacNet controllers on a DeviceNet network with a total network distance of 500 meters. Each DacNet is connected to an I/O module mounting rack. The racks are available in 8,16, 24, or 32 I/O positions. Analogue or digital modules, input or output, in any combination, can be plugged into each location on the rack. The maximum number of I/O that can be serviced by a DacNet network is 1984 (62controllers x 32 I/O).

Using the DeviceNet Group 2 messaging, a master device sends commands to the DacNet controllers to configure each unit, determine I/O status and to change output status. Commands are transmitted over the DeviceNet at baud rates up to 500 Kbaud. The command and response messages are 100% compatible with DeviceNet Group 2 messaging protocol.

DacNet contains the necessary circuitry for monitoring 5V digital signals or frequency measurement (Grayhill analog input modules convert the analog inputs to frequencies) on each of its 32 I/0 lines. DIP switches set the DeviceNet MAC ID and baud rate. On power up the microprocessor runs a diagnostic self test. After successful completion of the self test, the DIP switches are read, and the peripherals are initialised. Following initialisation, a hardware interrupt occurs every l millisecond. Each time the interrupt occurs, the CPU instructs the I/O controller to read and store the digital module status, update digital outputs, read 1 analogue input, and write up to 2 analogue output points. When a DeviceNet master requests I/O status from DacNet, the data is retrieved from RAM and placed in the response buffer.